Sr. ASIC Design Engineer

Parade Technologies is a fabless semiconductor company building ASICs for USB3.2, USB4, and PCIe. Our chips go into products made by top-tier electronics companies. We’re a fast-paced company that is growing to meet the demands for new and exciting products. 

We are seeking a highly experienced and enthusiastic Sr. ASIC Design Engineer to join our Oregon R&D team that’s building solutions for next-generation consumer electronics, personal computing, storage, and mobile devices. Bring your knowledge of semiconductor design, software, and firmware and come to work with a team of experienced engineers to help us grow!

Qualifications

·         Must have a Bachelor’s or Master’s degree, at least 5 years of experience in ASIC digital design, and have worked on at least 2 designs that have gone to silicon.

·         Must have a thorough understanding of digital design and verification; should be able to take a specification, write RTL, and write simulation vectors to verify their RTL.

·         Must have experience using Verilog and be familiar with PCIe, USB2, USB3 or other high-speed protocols.

Required Work Experience

• Demonstrate an expert knowledge of Verilog for chip design.

• Demonstrate knowledge of System Verilog (SV) or similar verification language.

• Ability to read specifications, create a Micro-Architecture Specification (MAS), then implement design.

• Understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug.

• Design experience with USB3, USB4, or PCIe is a big plus. Design experience with another high-speed serial protocol such as SATA, Ethernet, Fibre Channel, or Display Port is also acceptable.

Interpersonal Skills

·         Enthusiastic, self-motivated, and flexible with strong interpersonal skills.

·         Be able to work in a team environment and mentor junior engineers.

·         Good communication skills, oral and written.